Plan 9 from Bell Labs’s /usr/web/sources/extra/9hist/ss/clock.c

Copyright © 2021 Plan 9 Foundation.
Distributed under the MIT License.
Download the Plan 9 distribution.


## diffname ss/clock.c 1990/1223
## diff -e /dev/null /n/bootesdump/1990/1223/sys/src/9/sparc/clock.c
0a
#include	"u.h"
#include	"lib.h"
#include	"mem.h"
#include	"dat.h"
#include	"fns.h"
#include	"io.h"

#include	"ureg.h"

void
delay(int ms)
{
	ulong t, *p;
	int i;

	ms *= 1000;	/* experimentally determined */
	for(i=0; i<ms; i++)
		;
}

void
clock(Ureg *ur)
{
	Proc *p;

	SYNCREG[1] = 0x5F;	/* clear interrupt */
	m->ticks++;
	p = m->proc;
	if(p){
		p->pc = ur->pc;
		if (p->state==Running)
			p->time[p->insyscall]++;
	}
	checkalarms();
	kbdclock();
	mouseclock();
	if((ur->sr&SPL(7)) == 0 && p && p->state==Running){
		sched();
		if(u->nnote && (ur->sr&SUPER)==0)
			notify(ur);
	}
}
.
## diffname ss/clock.c 1990/1226
## diff -e /n/bootesdump/1990/1223/sys/src/9/sparc/clock.c /n/bootesdump/1990/1226/sys/src/9/sparc/clock.c
39c
		if(u->nnote && (ur->psr&PSRSUPER)==0)
.
37c
	if((ur->psr&SPL(7)) == 0 && p && p->state==Running){
.
16c
	ms *= 2000;	/* experimentally determined */
.
## diffname ss/clock.c 1990/1227
## diff -e /n/bootesdump/1990/1226/sys/src/9/sparc/clock.c /n/bootesdump/1990/1227/sys/src/9/sparc/clock.c
37,39c
	if((ur->psr&SPL(0xF))==0 && p && p->state==Running){
		if(anyready())
			sched();
		if(u->nnote && (ur->psr&PSRPSUPER)==0)
.
26c
	i = ctr->lim1;	/* clear interrupt */
	USED(i);
.
24a
	ulong i;
.
21a
clockinit(void)
{
	KMap *k;

	k = kmappa(CLOCK, PTENOCACHE|PTEIO);
	ctr = (Ctr*)k->va;
	ctr->lim1 = (CLOCKFREQ/HZ)<<10;
}

void
.
20a
typedef struct Ctr Ctr;
struct Ctr
{
	ulong	ctr0;
	ulong	lim0;
	ulong	ctr1;
	ulong	lim1;
};
Ctr	*ctr;

.
## diffname ss/clock.c 1991/0711
## diff -e /n/bootesdump/1991/0201/sys/src/9/sparc/clock.c /n/bootesdump/1991/0711/sys/src/9/slc/clock.c
62,63c
		if((ur->psr&PSRPSUPER) == 0){
			*(ulong*)(USTKTOP-BY2WD) += TK2MS(1);
			if(u->nnote)
				notify(ur);
		}
.
## diffname ss/clock.c 1991/0723
## diff -e /n/bootesdump/1991/0711/sys/src/9/slc/clock.c /n/bootesdump/1991/0723/sys/src/9/slc/clock.c
63c
/*			*(ulong*)(USTKTOP-BY2WD) += TK2MS(1); /**/
.
## diffname ss/clock.c 1991/0821
## diff -e /n/bootesdump/1991/0723/sys/src/9/slc/clock.c /n/bootesdump/1991/0821/sys/src/9/slc/clock.c
60,61c
		if(anyready()){
			if(p->hasspin)
				p->hasspin = 0;
			else
				sched();
		}
.
## diffname ss/clock.c 1991/1003
## diff -e /n/bootesdump/1991/0821/sys/src/9/slc/clock.c /n/bootesdump/1991/1003/sys/src/9/slc/clock.c
58a
	sccclock();
.
## diffname ss/clock.c 1991/1006
## diff -e /n/bootesdump/1991/1003/sys/src/9/slc/clock.c /n/bootesdump/1991/1006/sys/src/9/slc/clock.c
59a
	kproftimer(ur->pc);
.
## diffname ss/clock.c 1991/1111
## diff -e /n/bootesdump/1991/1006/sys/src/9/slc/clock.c /n/bootesdump/1991/1111/sys/src/9/slc/clock.c
70,71c
			notify(ur);
.
## diffname ss/clock.c 1991/1113
## diff -e /n/bootesdump/1991/1111/sys/src/9/slc/clock.c /n/bootesdump/1991/1113/sys/src/9/slc/clock.c
70a
			splx(ss);				/* return hi for restore */
.
69c
			ss = spllo();				/* Low because we may fault */
			*(ulong*)(USTKTOP-BY2WD) += TK2MS(1);
.
55a
	nrun = (nrdy+nrun)*1000;
	MACHP(0)->load = (MACHP(0)->load*19+nrun)/20;

.
51a
		nrun = 1;
.
45c
	ulong i, ss, nrun = 0;
	Segment *s;
.
## diffname ss/clock.c 1991/1114
## diff -e /n/bootesdump/1991/1113/sys/src/9/slc/clock.c /n/bootesdump/1991/1114/sys/src/9/slc/clock.c
76,77c
			splhi();				/* return hi for restore */
.
74c
			spllo();				/* Low because we may fault */
.
45c
	ulong i, nrun = 0;
.
## diffname ss/clock.c 1991/1115
## diff -e /n/bootesdump/1991/1114/sys/src/9/slc/clock.c /n/bootesdump/1991/1115/sys/src/9/slc/clock.c
16c
	ms *= 3000;	/* experimentally determined */
.
## diffname ss/clock.c 1992/0321
## diff -e /n/bootesdump/1991/1115/sys/src/9/slc/clock.c /n/bootesdump/1992/0321/sys/src/9/slc/clock.c
2c
#include	"../port/lib.h"
.
## diffname ss/clock.c 1992/0711
## diff -e /n/bootesdump/1992/0321/sys/src/9/slc/clock.c /n/bootesdump/1992/0711/sys/src/9/slc/clock.c
46d
13d
## diffname ss/clock.c 1992/0807
## diff -e /n/bootesdump/1992/0807/sys/src/9/slc/clock.c /n/bootesdump/1992/0807/sys/src/9/ss/clock.c
63a
	if(m->fpunsafe)
		return;
.
## diffname ss/clock.c 1992/0811
## diff -e /n/bootesdump/1992/0807/sys/src/9/ss/clock.c /n/bootesdump/1992/0811/sys/src/9/ss/clock.c
76,77d
73,74c
		if((ur->psr&PSRPSUPER) == 0)
.
## diffname ss/clock.c 1992/0820
## diff -e /n/bootesdump/1992/0811/sys/src/9/ss/clock.c /n/bootesdump/1992/0820/sys/src/9/ss/clock.c
15c
	ms *= 6666;		/* experimentally determined */
	if(conf.ss2)
		ms *= 2;
.
## diffname ss/clock.c 1992/0914
## diff -e /n/bootesdump/1992/0820/sys/src/9/ss/clock.c /n/bootesdump/1992/0914/sys/src/9/ss/clock.c
68c

	if((ur->psr&SPL(0xF))==0 && p && p->state==Running) {
.
## diffname ss/clock.c 1993/0501 # deleted
## diff -e /n/bootesdump/1992/0914/sys/src/9/ss/clock.c /n/fornaxdump/1993/0501/sys/src/brazil/ss/clock.c
1,79d

Bell Labs OSI certified Powered by Plan 9

(Return to Plan 9 Home Page)

Copyright © 2021 Plan 9 Foundation. All Rights Reserved.
Comments to [email protected].